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Gaurav R. Agrawal | Leena A. Yelmule


Gaurav R. Agrawal | Leena A. Yelmule "Linear CMOS LNA" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-3 | Issue-1, December 2018, pp.829-835, URL: https://www.ijtsrd.com/papers/ijtsrd19087.pdf

In this work, a highly linear Cascode CMOS LNA is presented. Linearity issues in RF receiver frontend are discussed, followed by an analysis of the specifications and requirements of a LNA through consideration of multi-standard LNA. Device non-linear characteristics cause linearity problems in the RF front-end system. To solve this problem, Post linearization technique for inductively degenerated (L-deg) common source Cascode Low Noise Amplifier is presented, which improves linearity performance with small gain loss and current consumption as consequence.The LNA presented has 1.0GHz – 3.2GHz frequency range designed using TSMC 0.18µm CMOS process. The linearized LNA achieves an IIP3 of +5.0 dBm, with P-1dB of -14 dBm, 13.8 dB gain (max), NF 2.03dB and power utilization of 19.4 mWat 1.8 volt power supply

Low noise amplifier (LNA), complementary metal oxide semiconductor (CMOS), nonlinearity, third-order input intercept point (IIP3), third-order intermodulation distortion (IMD3), common source amplifier, post linearization

Volume-3 | Issue-1, December 2018
IJTSRD | www.ijtsrd.com | E-ISSN 2456-6470
Copyright © 2019 by author(s) and International Journal of Trend in Scientific Research and Development Journal. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0) (http://creativecommons.org/licenses/by/4.0)

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