A Review on Fast FPGA Development of RSD based ECC Processor

V. Surega

Title:
A Review on Fast FPGA Development of RSD based ECC Processor

Authors:
V. Surega
DOI:
https://doi.org/10.31142/ijtsrd7166

Cite This Article :

V. Surega "A Review on Fast FPGA Development of RSD based ECC Processor" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-3, April 2018, pp.583-586, URL: https://www.ijtsrd.com/papers/ijtsrd7166.pdf

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Abstract :
Elliptic curve Cryptography (ECC) is an asymmetric cryptographic system such as Lenstra elliptic-curve factorization. This provides higher security than the Rivest, Shamir and Adleman system (RSA) system. The processor employs extensive pipelining techniques for Karatsuba–Ofman method to achieve high throughput multiplication. Furthermore, an pwerfull smodular adder without comparison and a highthroughput modular divider, which results in a short datapath for maximized frequency, are implemented. The processor supports the recommended NIST curve P256 and is based on an extended NIST reduction scheme. The proposed processor performs singlepoint multiplication employing points in affine coordinates in 2.26 ms and runs at a maximum frequency of 160 MHz in Xilinx Virtex 5 (XC5VLX110T) field-programmable gate array.

Keywords :
Application-specific instruction-set processor (ASIP), elliptic curve cryptography (ECC), and field-programmable gate array (FPGA), Karatsuba–Ofman multiplication, redundant signed digit (RSD).

Publication Details:

Unique Identification Number : IJTSRD7166

Published In : Volume-2 | Issue-3, April 2018

Page Number(s) : 583-586

Publisher Name : IJTSRD | www.ijtsrd.com | E-ISSN 2456-6470

Copyright © 2019 by author(s) and International Journal of Trend in Scientific Research and Development Journal. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0) (http://creativecommons.org/licenses/by/4.0)

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