In this paper, we investigated a new device, Hetero-junction less (H-JL) Double Gate Tunnel Field Effect Transistors (DGTFET) with high-k. III-V semiconductor material (like InAs-Si) gives excellent performance when InAs uses at source side, because of low band gap of 0.36 eV it reduces the potential barrier height of source channel interface causing maximum carriers are fastly tunnel across the source to drain in ON state whereas Si, at the drain side as higher bandgap Of increasing the barrier height of drain channel interface causing lower quantum tunneling occur, as a result good ION/IOFF ratio. The InAs-source JLDGTFET with high-k (Hfo2) at 20 nm channel length provide a tremendous characteristics with high	ratio , a point subthreshold swing (SS) and average SS	is at room temperature. The simulation study of proposed device is done using sentaurus tools.
                                
                                
                                    
                                    Band to Band Tunneling (BTBT), high dielectric material, junctionless, quantum tunnelling, SS, tunnel field effect transistors (TFETs)
                                
                                
                                
                                
                                    
                                        
                                        
                                        
                                        
                                            
                                                
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